Today's advanced electronics, such as high definition televisions, place ever increasing demands on electronics. For example, customers demand HDTV display systems that can display images with more and more natural colors. Typical LCD drivers for driving pixel arrays of an LCD display use digital-to-analog converters to convert digital codes representing voltage levels to corresponding analog outputs. For example, sixteen binary numbers can be expressed using 4-bits to represent output voltages of the DAC. An actual analog output voltage Vout is proportional to an input binary number, and is expressed as a multiple of the binary number. When the reference voltage Vref of the DAC is a constant, the output voltage Vout has only a discrete value, e.g., one of 16 possible voltage levels, so that the output of the DAC is not truly an analog value. However, the number of possible output values can be increased by increasing the number of bits of input data. A larger number of possible output values in the output range reduces the difference between DAC output values.
It should be apparent that when the DAC input includes a relatively large number of bits, the DAC provides a relatively high-resolution output. However, the circuit area consumed by the DAC increases proportionally with resolution. An increase by only 1 bit doubles the area of the decoder in the DAC.
By way of example, assume that the input data is 8 bits in a conventional R-type (resistive string) DAC. In this case, the DAC is configured with 256 resistors, 256 signal lines and one 256×1 decoder. Using this standard architecture, to fabricate a 10-bit DAC would require 1024 resistors, 1024 signal lines and one 1024×1 decoder. This DAC would consume four times as much chip or wafer area than a comparable 8-bit DAC.
Other problems also exist with conventional DACs. For example, conventional DAC's typically implement a sample and hold circuit using an operational amplifier (OP-AMP). Unfortunately, parasitic capacitance at an input terminal of the OP-AMP has an undesirable effect on an output of the DAC, namely off-set, when modulating a voltage level of a non-inverting input terminal of the OP-AMP. Moreover, the OP-AMP inputs are typically each configured with differential MOS pairs. The RMS offset can become out-of-spec when the input voltage is close to the MOS threshold voltages (Vth) of the differential pairs.
Jin-Seong Kang et al. have proposed in “10-bit Driver IC Using 3-bit DAC Embedded Operational Amplifier for Spatial Optical Modulators (SOMs),” IEEE Journal of Solid-State Circuits, Vol. 42, No. 12, December 2007, embedding part of the DAC in the OP-Amp circuitry to save area for higher resolutions (e.g., 10-bit). However, with this architecture the DAC linearity worsens with increases in resolution.
A new DAC architecture is desired with improved linearity and offset compensation.